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MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
13 years 11 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
FPL
2008
Springer
107views Hardware» more  FPL 2008»
13 years 7 months ago
Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. However, this approach results in inefficient memory utilization. Due to available...
Hoang Le, Weirong Jiang, Viktor K. Prasanna
JSA
2006
113views more  JSA 2006»
13 years 5 months ago
A power-efficient TCAM architecture for network forwarding tables
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Taskin Koçak, Faysal Basci
SIGCOMM
2009
ACM
14 years 8 days ago
Hash, don't cache: fast packet forwarding for enterprise edge routers
As forwarding tables and link speeds continue to grow, fast packet forwarding becomes increasingly challenging for enterprise edge routers. Simply building routers with ever large...
Minlan Yu, Jennifer Rexford
CN
2008
162views more  CN 2008»
13 years 5 months ago
A cache-based internet protocol address lookup architecture
This paper proposes a novel Internet Protocol (IP) packet forwarding architecture for IP routers. This architecture is comprised of a non-blocking Multizone Pipelined Cache (MPC) ...
Soraya Kasnavi, Paul Berube, Vincent C. Gaudet, Jo...