37 search results - page 1 / 8 » Activity Estimation for Field-Programmable Gate Arrays |
FPL
2006
Springer
13 years 8 months ago
2006
Springer
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Speci...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
FPL
2004
Springer
13 years 10 months ago
2004
Springer
This paper investigates experimentally the quantitative impact of pipelining on energy per operation for two representative FPGA devices: a 0.13µm CMOS high density/high speed FPG...
DELTA
2006
IEEE
13 years 8 months ago
2006
IEEE
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
FPGA
2001
ACM
13 years 9 months ago
2001
ACM
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...