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» Algebraic Models of Simultaneous Multithreaded and Multi-cor...
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CGO
2004
IEEE
13 years 8 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
ICCD
2004
IEEE
126views Hardware» more  ICCD 2004»
14 years 1 months ago
Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...
Joshua L. Kihm, Daniel A. Connors
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
14 years 1 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang
ASPLOS
2010
ACM
13 years 10 months ago
Probabilistic job symbiosis modeling for SMT processor scheduling
Symbiotic job scheduling boosts simultaneous multithreading (SMT) processor performance by co-scheduling jobs that have ‘compatible’ demands on the processor’s shared resour...
Stijn Eyerman, Lieven Eeckhout
ASPLOS
2008
ACM
13 years 6 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August