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» An Area Efficient Mixed-Signal Test Architecture for Systems...
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VLSID
2006
IEEE
111views VLSI» more  VLSID 2006»
14 years 5 months ago
An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip
Hari Vijay Venkatanarayanan, Michael L. Bushnell
ET
2006
154views more  ET 2006»
13 years 5 months ago
An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults
We present an efficient built-in self-test (BIST) architecture for testing and diagnosing stuck-at faults, delay faults, and bridging faults in FPGA interconnect resources. The BIS...
Jack Smith, Tian Xia, Charles E. Stroud
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
13 years 9 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ECBS
2010
IEEE
200views Hardware» more  ECBS 2010»
13 years 3 months ago
Improving Testing of Enterprise Systems by Model-Based Testing on Graphical User Interfaces
Software development and testing of Enterprise Resource Planning (ERP) systems demands dedicated methods to tackle its special features. As manual testing is not able to systematic...
Sebastian Wieczorek, Alin Stefanescu
FCCM
2006
IEEE
170views VLSI» more  FCCM 2006»
13 years 9 months ago
An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems
The Apriori algorithm is a fundamental correlation-based data mining kernel used in a variety of fields. The innovation in this paper is a highly parallel custom architecture impl...
Zachary K. Baker, Viktor K. Prasanna