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DATE
2002
IEEE
63views Hardware» more  DATE 2002»
13 years 10 months ago
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs
Ashok Halambi, Aviral Shrivastava, Partha Biswas, ...
CASES
2005
ACM
13 years 7 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
TCAD
2008
201views more  TCAD 2008»
13 years 5 months ago
Bitmask-Based Code Compression for Embedded Systems
Embedded systems are constrained by the available memory. Code-compression techniques address this issue by reducing the code size of application programs. It is a major challenge ...
Seok-Won Seong, Prabhat Mishra
CASES
2006
ACM
13 years 11 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
CASES
2008
ACM
13 years 7 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...