13 search results - page 1 / 3 » An Enhancement for a Scheduling Logic Pipelined over two Cyc... |
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
EUROPAR
2005
Springer
13 years 10 months ago
2005
Springer
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
PRDC
2008
IEEE
13 years 11 months ago
2008
IEEE
Reliability has become a serious concern as systems embrace nanometer technologies. In this paper, we propose a novel approach for organizing redundancy that provides high degree ...
CF
2008
ACM
13 years 6 months ago
2008
ACM
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...