13 search results - page 1 / 3 » An ILP based hierarchical global routing approach for VLSI A... |
OL
2007
13 years 4 months ago
2007
DAC
2006
ACM
14 years 6 months ago
2006
ACM
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
GLVLSI
1996
IEEE
13 years 9 months ago
1996
IEEE
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
GLVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...