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ASPDAC
1998
ACM
101views Hardware» more  ASPDAC 1998»
13 years 9 months ago
An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
Jinan Lou, Amir H. Salek, Massoud Pedram
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
12 years 8 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
FPGA
2009
ACM
233views FPGA» more  FPGA 2009»
13 years 11 months ago
FPCNA: a field programmable carbon nanotube array
Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architect...
Chen Dong, Scott Chilstedt, Deming Chen
SLIP
2009
ACM
13 years 11 months ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
DAC
2009
ACM
14 years 5 months ago
A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
Shiyan Hu, Zhuo Li, Charles J. Alpert