6 search results - page 1 / 2 » An efficient run-time router for connecting modules in FPGAS |
FPL
2008
Springer
13 years 6 months ago
2008
Springer
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
ERSA
2006
13 years 6 months ago
2006
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
EVOW
2003
Springer
13 years 10 months ago
2003
Springer
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
FPGA
2000
ACM
13 years 8 months ago
2000
ACM
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...