In this paper, we formulate a new class of optimization problem, named the general CH-posynomial program, and reveal the general dominance property. We propose an efcient algorith...
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok K...
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
—Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very l...
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...