117 search results - page 2 / 24 » An optimal algorithm for sizing sequential circuits for indu... |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
HIPC
2004
Springer
13 years 10 months ago
2004
Springer
This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...