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DAC
1997
ACM
13 years 9 months ago
Structured Design of Microelectromechanical Systems
In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is ...
Tamal Mukherjee, Gary K. Fedder
ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
13 years 10 months ago
Porosity aware buffered steiner tree construction
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jia...
EH
2002
IEEE
185views Hardware» more  EH 2002»
13 years 10 months ago
Automatic Synthesis Using Genetic Programming of an Improved General-Purpose Controller for Industrially Representative Plants
Most real-world controllers are composed of proportional, integrative, and derivative signal processing blocks. The so-called PID controller was invented and patented by Callender...
Martin A. Keane, John R. Koza, Matthew J. Streeter
FCT
2003
Springer
13 years 10 months ago
Graph Searching, Elimination Trees, and a Generalization of Bandwidth
The bandwidth minimization problem has a long history and a number of practical applications. In this paper we introduce a natural extension of bandwidth to partially ordered layo...
Fedor V. Fomin, Pinar Heggernes, Jan Arne Telle
ICCAD
1996
IEEE
122views Hardware» more  ICCAD 1996»
13 years 9 months ago
Analytical delay models for VLSI interconnects under ramp input
Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However,for typical R...
Andrew B. Kahng, Kei Masuko, Sudhakar Muddu