20 search results - page 2 / 4 » Analysis, reduction and avoidance of crosstalk on VLSI chips |
ISPD
2005
ACM
13 years 11 months ago
2005
ACM
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
GLVLSI
2005
IEEE
13 years 11 months ago
2005
IEEE
3D packaging via System-On-Package (SOP) is a viable alternative to System-On-Chip (SOC) to meet the rigorous requirements of today’s mixed signal system integration. In this wo...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
KDD
2000
ACM
13 years 9 months ago
2000
ACM
We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated...