3D module placement for congestion and power noise reduction

3D packaging via System-On-Package (SOP) is a viable alternative to System-On-Chip (SOC) to meet the rigorous requirements of today’s mixed signal system integration. In this work, we propose a 3D module and decap (decoupling capacitance) placement algorithm that simultaneously reduces the power supply noise and wire congestion. We provide efficient algorithms for 3D power supply noise and congestion analysis to guide our 3D module placement process. In addition, we allocate white spaces around the modules that require decaps to suppress the power supply noise while minimizing the area overhead. In our experimentation, we achieve improvements in both decap amount and congestion with only small increase in area, wirelength, and runtime. Categories and Subject Descriptors B.7.2 [Design Aid]: Placement and routing General Terms Algorithms, Design Keywords System-On-Package, 3D Module Placement, Congestion, Power Noise Reduction

• Type: Conference
• Year: 2005
• Where: GLVLSI
• Authors: Jacob R. Minz, Sung Kyu Lim, Cheng-Kok Koh
• Keywords: GLVLSI 2005, Module Placement, Module Placement Process, Power Supply Noise, VLSI