Sciweavers

19 search results - page 1 / 4
» Analysis of RC Interconnections Under Ramp Input
Sort
View
VLSID
1999
IEEE
64views VLSI» more  VLSID 1999»
13 years 9 months ago
Exact Output Response Computation of RC Interconnects under Polynomial Input Waveforms
Accurate output response computation of RC interconnects under various input excitations is a key issue in deep submicron delay analysis.In this paper,we present an exact analysis...
Satrajit Gupta, Lalit M. Patnaik
ICCAD
1996
IEEE
122views Hardware» more  ICCAD 1996»
13 years 9 months ago
Analytical delay models for VLSI interconnects under ramp input
Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However,for typical R...
Andrew B. Kahng, Kei Masuko, Sudhakar Muddu
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
13 years 10 months ago
Closed form expressions for extending step delay and slew metrics to ramp inputs
: Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these...
Chandramouli V. Kashyap, Charles J. Alpert, Frank ...
DAC
2000
ACM
14 years 5 months ago
On switch factor based analysis of coupled RC interconnects
We revisit a basic element of modern signal integrity analysis, the modeling of worst-case coupling capacitance effects within a switch factor (SF) based methodology. We show that...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto