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GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Analyzing and modeling process balance for sub-threshold circuit design
Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 6 months ago
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay,...
MM
2010
ACM
141views Multimedia» more  MM 2010»
13 years 3 months ago
Automatic and manual processes in end-user multimedia authoring tools: where is the balance?
This thesis aims to analyze, model, and develop a framework for next-generation multimedia authoring tools targeted to end-users. In particular, I concentrate on the combination o...
Rodrigo Laiola Guimarães
DAC
2009
ACM
14 years 5 months ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson
ISQED
2003
IEEE
119views Hardware» more  ISQED 2003»
13 years 10 months ago
System and Framework for QA of Process Design Kits
In this paper, we evaluate the dependencies between tools, data and environment in process design kits, and present a framework for systematically analyzing the quality of the des...
M. C. Scott, M. O. Peralta, Jo Dale Carothers