9 search results - page 2 / 2 » Architecture and DSP Implementation of a DVB-S2 Baseband Dem... |
TVLSI
2010
13 years 6 days ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
NOCS
2009
IEEE
14 years 7 days ago
2009
IEEE
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
VLSISP
2002
13 years 5 months ago
2002
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
CODES
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...