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DATE
2002
IEEE
146views Hardware» more  DATE 2002»
13 years 9 months ago
Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The meth...
Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, A...
RTCSA
2005
IEEE
13 years 10 months ago
Using UML 2.0 for System Level Design of Real Time SoC Platforms for Stream Processing
While enabling fast implementation and reconfiguration of stream applications, programmable stream processors expose issues of incompatibility and lack of adoption in existing st...
Yongxin Zhu, Zhenxin Sun, Alexander Maxiaguine, We...
ASPDAC
2008
ACM
134views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Automatic re-coding of reference code into structured and analyzable SoC models
The quality of the input system model has a direct bearing on the effectiveness of the system exploration and synthesis tools. Given a well-structured system model, tools today are...
Pramod Chandraiah, Rainer Dömer
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
13 years 10 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
ASPDAC
2006
ACM
169views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication
– In shared SoC bus systems, arbiters are usually adopted to solve bus contentions with various kinds of arbitration algorithms. We propose an arbitration algorithm, RT_lottery, ...
Chien-Hua Chen, Geeng-Wei Lee, Juinn-Dar Huang, Ji...