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VTS
1996
IEEE
126views Hardware» more  VTS 1996»
13 years 9 months ago
Automatic test generation using genetically-engineered distinguishing sequences
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
DAC
1995
ACM
13 years 9 months ago
Automatic Clock Abstraction from Sequential Circuits
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
Samir Jain, Randal E. Bryant, Alok Jain
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
13 years 9 months ago
Deterministic Test Pattern Generation Techniques for Sequential Circuits
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
Ilker Hamzaoglu, Janak H. Patel
DATE
1999
IEEE
111views Hardware» more  DATE 1999»
13 years 9 months ago
Sequential Circuit Test Generation Using Decision Diagram Models
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
Jaan Raik, Raimund Ubar
ISLPED
1997
ACM
106views Hardware» more  ISLPED 1997»
13 years 9 months ago
A sequential procedure for average power analysis of sequential circuits
A new statistical technique for average power estimation in sequential circuits is presented. Due to the feedback mechanism, conventional statistical procedures cannot be applied ...
Li-Pen Yuan, Sung-Mo Kang