32 search results - page 6 / 7 » CELONCEL: Effective design technique for 3-D monolithic inte... |
GLVLSI
2009
IEEE
13 years 9 months ago
2009
IEEE
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
MICRO
2008
IEEE
13 years 11 months ago
2008
IEEE
Parameter variation in integrated circuits causes sections of a chip to be slower than others. If, to prevent any resulting timing errors, we design processors for worst-case para...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effec...
BMCBI
2008
13 years 5 months ago
2008
Background: Nucleic acid hybridization, a fundamental technique in molecular biology, can be modified into very effective and sensitive methods for detecting particular targets mi...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...