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» Can Parallel Algorithms Enhance Serial Implementation
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VLSISP
2008
132views more  VLSISP 2008»
13 years 5 months ago
Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
Brian M. H. Li, Philip Heng Wai Leong
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
14 years 22 hour ago
Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)
— The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to ...
Umair F. Siddiqi, Sadiq M. Sait
ISCAS
2005
IEEE
101views Hardware» more  ISCAS 2005»
13 years 11 months ago
Parallel algorithm for hardware implementation of inverse halftoning
— A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse hal...
Umair F. Siddiqi, Sadiq M. Sait, Aamir A. Farooqui
DATESO
2010
233views Database» more  DATESO 2010»
13 years 3 months ago
Efficient Implementation of XPath Processor on Multi-Core CPUs
Abstract. Current XPath processors use direct approach to query evaluation which is quite inefficient in some cases and usually implemented serially. This may be a problem in case ...
Martin Krulis, Jakub Yaghob