6 search results - page 1 / 2 » Clock Period Optimization During Resource Sharing and Assign... |
DAC
1994
ACM
13 years 8 months ago
1994
ACM
- This paper analyzes the effect of resource sharing and assignment on the clock period of the synthesized circuit. We focus on behavioral specifications with mutually exclusive pa...
ICCAD
1993
IEEE
13 years 8 months ago
1993
IEEE
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
DAC
2008
ACM
13 years 6 months ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
DAC
1998
ACM
13 years 8 months ago
1998
ACM
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...