15 search results - page 2 / 3 » Clock Synchronization in Cell BE Traces |
ICPPW
2008
IEEE
13 years 11 months ago
2008
IEEE
Event traces are helpful in understanding the performance behavior of message-passing applications since they allow in-depth analyses of communication and synchronization patterns...
MOBISYS
2011
ACM
12 years 7 months ago
2011
ACM
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
DFT
2006
IEEE
13 years 8 months ago
2006
IEEE
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...