624 search results - page 1 / 125 » Co-optimization of Performance and Power in a Superscalar Pr... |
EUC
2006
Springer
13 years 8 months ago
2006
Springer
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
— On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance...
WCAE
2006
ACM
13 years 10 months ago
2006
ACM
Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff b...
CF
2005
ACM
13 years 6 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
PATMOS
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. The load-store queue (LQ-SQ) of modern superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed a...