68 search results - page 3 / 14 » Communication optimizations for global multi-threaded instru... |
ICS
2007
Tsinghua U.
13 years 11 months ago
2007
Tsinghua U.
Overlapping communication with computation is an important optimization on current cluster architectures; its importance is likely to increase as the doubling of processing power ...
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
ICPP
2009
IEEE
13 years 3 months ago
2009
IEEE
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
CODES
2004
IEEE
13 years 9 months ago
2004
IEEE
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...