37 search results - page 1 / 8 » Compact FPGA implementations of QUAD |
CCS
2007
ACM
13 years 11 months ago
2007
ACM
QUAD is a stream cipher whose provable security relies on the hardness of solving systems of multivariate quadratic equations. This paper explores FPGA implementations of the stre...
CHES
2003
Springer
13 years 10 months ago
2003
Springer
Abstract. In this paper a compact FPGA architecture for the AES algorithm with 128-bit key targeted for low-cost embedded applications is presented. Encryption, decryption and key ...
RECONFIG
2008
IEEE
13 years 11 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
FPL
2011
Springer
12 years 4 months ago
2011
Springer
In this paper two compact hardware structures for the computation of the CLEFIA encryption algorithm are presented. One structure based on the existing state of the art and a nove...
FCCM
2011
IEEE
12 years 8 months ago
2011
IEEE
Abstract—Ballooning traffic volumes and increasing linkspeeds require ever high compute power to perform complex real-time processing of network packets. FPGAs have already been...