98 search results - page 2 / 20 » Compact Vector Generation for Accurate Power Simulation |
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
Excessive switching activity during scan testing can cause average power dissipation and peak power during test to be much higher than during normal operation. This can cause prob...
DAC
1997
ACM
13 years 9 months ago
1997
ACM
- The objective of this paper is to provide an effective technique for accurate modeling of the external input sequences that affect the behavior of Finite State Machines (FSMs). T...
VTS
1997
IEEE
13 years 9 months ago
1997
IEEE
Two fast algorithms for static test sequence compaction are proposed for sequential circuits. The algorithms are based on the observation that test sequences traverse through a sm...
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- Power consumption is one of the major challenges in VLSI Design. Power constrained designs need tools to accurately predict the power consumption and provide feedback to designer...