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APPINF
2003
13 years 6 months ago
Comparing the Optimal Performance of Multiprocessor Architectures
Consider a parallel program with n processes and a synchronization granularity z. Consider also two multiprocessors: a multiprocessor with q processors and run-time reallocation o...
Lars Lundberg, Kamilla Klonowska, Magnus Broberg, ...
IPPS
1998
IEEE
13 years 8 months ago
Comparing the Optimal Performance of Different MIMD Multiprocessor Architectures
We compare the performance of systems consisting of one large cluster containing q processors with systems where processors are grouped into k clusters containing u processors eac...
Lars Lundberg, Håkan Lennerstad
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
13 years 9 months ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
SIES
2008
IEEE
13 years 11 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
CODES
2004
IEEE
13 years 8 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...