46 search results - page 2 / 10 » Correlation-aware statistical timing analysis with non-gauss... |
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
DATE
2008
IEEE
13 years 12 months ago
2008
IEEE
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
WCE
2007
13 years 6 months ago
2007
— This paper presents the initial results of a study aimed at improving the method by which the vibrations produced by transport vehicles are characterised and simulated. More sp...