23 search results - page 4 / 5 » Coupling-Driven Bus Design for Low-Power Application-Specifi... |
GLVLSI
2003
IEEE
13 years 11 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
PPL
2008
13 years 5 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
CASES
2003
ACM
13 years 11 months ago
2003
ACM
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
CODES
2000
IEEE
13 years 10 months ago
2000
IEEE
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...