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ERSA
2006
282views Hardware» more  ERSA 2006»
13 years 7 months ago
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture
Reconfigurable devices, such as FPGAs, introduce into the design workflow of embedded systems a new degree of freedom: the designer can have the system autonomously modify the fun...
Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santam...
FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
13 years 9 months ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
ICW
2005
IEEE
167views Communications» more  ICW 2005»
13 years 11 months ago
Dynamic Software Reconfiguration in Sensor Networks
Reconfiguration and self-adaptation are vital capabilities of sensor networks and networked embedded systems that are required to operate in dynamic environments. This paper prese...
Sachin Kogekar, Sandeep Neema, Xenofon D. Koutsouk...
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
13 years 11 months ago
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jun...
TVLSI
2008
187views more  TVLSI 2008»
13 years 5 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...