71 search results - page 1 / 15 » Design and Implementation of a High Speed Microprocessor Sim... |
MASCOTS
2004
13 years 6 months ago
2004
This paper describes the design and implementation of our high speed simulator for out-of-order microprocessors named BurstScalar. The simulator is based on the wellknown SimpleSc...
RECONFIG
2008
IEEE
13 years 12 months ago
2008
IEEE
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
TVLSI
2008
13 years 5 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— Bit and subword permutations are useful in many multimedia and cryptographic applications. New shift and permute instructions have been added to the instruction set of general-...