Sciweavers

6 search results - page 1 / 2
» Design of a Low Power Image Watermarking Encoder Using Dual ...
Sort
View
VLSID
2005
IEEE
108views VLSI» more  VLSID 2005»
14 years 5 months ago
Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
CIT
2004
Springer
13 years 10 months ago
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
Abstract. Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. W...
Saraju P. Mohanty, Renuka Kumara C., Sridhara Naya...
ICIP
2003
IEEE
14 years 6 months ago
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...
Andrew Laffely, Jian Liang, Russell Tessier, Wayne...
GLVLSI
2005
IEEE
147views VLSI» more  GLVLSI 2005»
13 years 10 months ago
1-V 7-mW dual-band fast-locked frequency synthesizer
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 5 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood