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» Designing Leakage Aware Multipliers
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DCOSS
2006
Springer
13 years 10 months ago
Approximation Algorithms for Power-Aware Scheduling of Wireless Sensor Networks with Rate and Duty-Cycle Constraints
We develop algorithms for finding the minimum energy transmission schedule for duty-cycle and rate constrained wireless sensor nodes transmitting over an interference channel. Sinc...
Rajgopal Kannan, Shuangqing Wei
PATMOS
2007
Springer
14 years 13 days ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
TCAD
2008
172views more  TCAD 2008»
13 years 6 months ago
General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodr...
TVLSI
2008
107views more  TVLSI 2008»
13 years 6 months ago
Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs
Thermal hot spots and high temperature gradients degrade reliability and performance, and increase cooling costs and leakage power. In this paper, we explore the benefits of temper...
Ayse Kivilcim Coskun, T. T. Rosing, Keith Whisnant...
FPL
2004
Springer
144views Hardware» more  FPL 2004»
13 years 10 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna