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ISPD
2009
ACM
84views Hardware» more  ISPD 2009»
13 years 11 months ago
Diffusion-driven congestion reduction for substrate topological routing
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
DAC
2008
ACM
14 years 5 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
TCAD
2002
73views more  TCAD 2002»
13 years 4 months ago
A timing-constrained simultaneous global routing algorithm
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar
ICCAD
2000
IEEE
91views Hardware» more  ICCAD 2000»
13 years 9 months ago
A Timing-Constrained Algorithm for Simultaneous Global Routing of Multiple Nets
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar