97 search results - page 1 / 20 » Distributed and low-power synchronization architecture for e... |
HPCC
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to efï¬...
CODES
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...