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» Dynamic Cache Switching in Reconfigurable Embedded Systems
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DATE
2004
IEEE
151views Hardware» more  DATE 2004»
13 years 8 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
DAC
2000
ACM
13 years 9 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava
ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
13 years 6 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
ICCAD
1998
IEEE
109views Hardware» more  ICCAD 1998»
13 years 9 months ago
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Field programmable gate arrays (FPGAs) are commonly used in embedded systems. Although it is possible to reconfigure some FPGAs while an embedded system is operational, this featu...
Robert P. Dick, Niraj K. Jha
FDL
2004
IEEE
13 years 8 months ago
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime re...
Andreas Schallenberg, Frank Oppenheimer, Wolfgang ...