Sciweavers

167 search results - page 1 / 34
» Dynamic Functional Unit Assignment for Low Power
Sort
View
DATE
2003
IEEE
84views Hardware» more  DATE 2003»
13 years 10 months ago
Dynamic Functional Unit Assignment for Low Power
A hardware method for functional unit assignment is presented, based on the principle that a functional unit’s power consumption is approximated by the switching activity of its...
Steve Haga, Natasha Reeves, Rajeev Barua, Diana Ma...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
TVLSI
2010
12 years 11 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
ASPDAC
2007
ACM
185views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Exploration of Low Power Adders for a SIMD Data Path
Giacomo Paci, Paul Marchal, Luca Benini
ISLPED
2007
ACM
94views Hardware» more  ISLPED 2007»
13 years 6 months ago
Design of an efficient power delivery network in an soc to enable dynamic power management
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
Behnam Amelifard, Massoud Pedram