In this study, we propose the use of specialized influence models to capture the dynamic behavior of a Network-onChip (NoC). Our goal is to construct a versatile modeling framewor...
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew, global clock signal becomes increasingly difficult. Challenges imposed by dee...
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...