15 search results - page 1 / 3 » Dynamic and leakage power reduction in MTCMOS circuits using... |
DAC
2002
ACM
14 years 5 months ago
2002
ACM
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...