65 search results - page 13 / 13 » Dynamic power-performance adaptation of parallel computation... |
EUROPAR
2004
Springer
13 years 11 months ago
2004
Springer
OLAP queries are typically heavy-weight and ad-hoc thus requiring high storage capacity and processing power. In this paper, we address this problem using a database cluster which...
ICS
2010
Tsinghua U.
13 years 8 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
ASPLOS
2008
ACM
13 years 7 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
HPCA
2009
IEEE
14 years 11 days ago
2009
IEEE
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...