- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
—Interconnect inductance introduces a shielding effect which decreases the effective capacitance seen by the driver of a circuit, reducing the gate delay. A model of the effectiv...
The optimum wire shape to produce the minimum signal propagation delay across an RLC line is shown to exhibit a general exponential form. The line inductance makes exponential tap...
— Interconnect plays an increasingly important role in deep submicrometer VLSI technologies. Multiple design criteria are considered in interconnect design, such as delay, power,...