Sciweavers

9 search results - page 2 / 2
» Effects of Inductance on the Propagation Delay and Repeater ...
Sort
View
GLVLSI
2003
IEEE
157views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Optimum wire sizing of RLC interconnect with repeaters
Repeaters are often used to drive high impedance interconnects. These lines have become highly inductive and can affect signal behavior. The line inductance should therefore be co...
Magdy A. El-Moursy, Eby G. Friedman
ISLPED
2007
ACM
138views Hardware» more  ISLPED 2007»
13 years 6 months ago
Power optimal MTCMOS repeater insertion for global buses
This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors ...
Hanif Fatemi, Behnam Amelifard, Massoud Pedram
ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
13 years 11 months ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
TVLSI
2002
144views more  TVLSI 2002»
13 years 4 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail