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IPPS
2003
IEEE
13 years 10 months ago
Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array
This paper describes a hardware architecture for modular multiplication operation which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptogra...
Siddika Berna Örs, Lejla Batina, Bart Preneel...
IOLTS
2007
IEEE
110views Hardware» more  IOLTS 2007»
13 years 11 months ago
An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding
In this paper we present an efficient design technique for implementing the Elliptic Curve Cryptographic (ECC) Scheme in FPGAs. Our technique is based on a novel and efficient i...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
13 years 9 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna
FPL
1998
Springer
107views Hardware» more  FPL 1998»
13 years 9 months ago
Modular Exponent Realization on FPGAs
The article describes modular exponent calculations used widely in cryptographic key exchange protocols. The measures for hardware consumption and execution speed based on argument...
Juri Põldre, Kalle Tammemäe, Marek Man...