12 search results - page 1 / 3 » Efficient Scheduling of DSP Code on Processors with Distribu... |
ISSS
1999
IEEE
13 years 9 months ago
1999
IEEE
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
VLSISP
2008
13 years 4 months ago
2008
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
LCTRTS
2007
Springer
13 years 10 months ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...