63 search results - page 1 / 13 » End-to-end validation of architectural power models |
ISLPED
2009
ACM
13 years 11 months ago
2009
ACM
While researchers have invested substantial effort to build architectural power models, validating such models has proven difficult at best. In this paper, we examine the accurac...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
DAC
2007
ACM
13 years 8 months ago
2007
ACM
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
PACS
2000
Springer
13 years 8 months ago
2000
Springer
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...