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    ASPDAC
    1999
    ACM
    123views Hardware» more  ASPDAC 1999»
    Estimation of Peak Current through CMOS VLSI Circuit Supply Lines
    13 years 9 months ago
    Estimation of Peak Current through CMOS VLSI Circuit Supply Lines
    Download  www.cecs.uci.edu
    Toshio Murayama, Kimihiro Ogawa, Haruhiko Yamaguch...
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    DATE
    1998
    IEEE
    93views Hardware» more  DATE 1998»
    Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits
    13 years 9 months ago
    Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits
    Download  cadlab.ece.ucsb.edu
    We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact so...
    Yi-Min Jiang, Kwang-Ting Cheng
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    DAC
    1997
    ACM
    82views Computer Architecture» more  DAC 1997»
    Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits
    13 years 9 months ago
    Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits
    Download  cadlab.ece.ucsb.edu
    Angela Krstic, Kwang-Ting Cheng
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    ICCAD
    1994
    IEEE
    115views Hardware» more  ICCAD 1994»
    Fast transient power and noise estimation for VLSI circuits
    13 years 9 months ago
    Fast transient power and noise estimation for VLSI circuits
    Download  www.cs.york.ac.uk
    Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
    Wolfgang T. Eisenmann, Helmut E. Graeb
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    GLVLSI
    2007
    IEEE
    173views VLSI» more  GLVLSI 2007»
    Modeling and estimating leakage current in series-parallel CMOS networks
    13 years 5 months ago
    Modeling and estimating leakage current in series-parallel CMOS networks
    Download  www.inf.ufrgs.br
    This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
    Paulo F. Butzen, André Inácio Reis, ...
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