21 search results - page 1 / 5 » Evaluating memory architectures for media applications on Co... |
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
VLSISP
2008
13 years 4 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
FCCM
2002
IEEE
13 years 9 months ago
2002
IEEE
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
ERSA
2004
13 years 6 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...