275 search results - page 3 / 55 » Examples of Models of the Asynchronous Circuits |
ASYNC
1999
IEEE
13 years 10 months ago
1999
IEEE
Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facili...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
ISQED
2009
IEEE
14 years 17 days ago
2009
IEEE
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
DFT
2002
IEEE
13 years 10 months ago
2002
IEEE
Concurrent error detection (CED) methods are typically employed to provide an indication of the operational health of synchronous circuits during normal functionality. Existing CE...
DAC
2005
ACM
13 years 7 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...