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» FPGA Intrinsic PUFs and Their Use for IP Protection
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FPL
2006
Springer
99views Hardware» more  FPL 2006»
13 years 9 months ago
Identifying FPGA IP-Cores Based on Lookup Table Content Analysis
In this paper we introduce a new method to identify IP cores in an FPGA by analyzing the content of lookup tables. This techniques can be used to identify registered cores for IP ...
Daniel Ziener, Stefan Assmus, Jürgen Teich
VLSISP
2008
103views more  VLSISP 2008»
13 years 3 months ago
Power Signature Watermarking of IP Cores for FPGAs
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
Daniel Ziener, Jürgen Teich
DAC
2001
ACM
14 years 6 months ago
Publicly Detectable Techniques for the Protection of Virtual Components
Highlighted with the newly released intellectual property (IP) protection white paper by VSI Alliance, the protection of virtual components (VCs) has received a large amount of at...
Gang Qu
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
13 years 12 months ago
Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints
In this paper, we propose a preprocessing method to improve Side Channel Attacks (SCAs) on Dual-rail with Precharge Logic (DPL) countermeasure family. The strength of our method i...
Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger,...
FPL
2004
Springer
171views Hardware» more  FPL 2004»
13 years 10 months ago
A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks
Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed...
David V. Schuehler, John W. Lockwood